How does semiconductor foundry manufacturing work?

When a chip designer needs silicon made, it doesn't build the factory itself — it hands a design to a specialized manufacturer called a foundry, and the economics of that relationship shape every product decision downstream.

Why this matters now

The most advanced chips in the world — the ones powering AI accelerators, server processors, and flagship mobile devices — are manufactured by a surprisingly small number of foundries. When demand for a particular process node spikes, even the largest chip designers face supply constraints that directly threaten their product roadmaps. Understanding how foundry manufacturing works explains why a chip company might accept higher per-unit costs to secure a second supplier: supply certainty can outweigh process perfection.

How it works

Semiconductor foundry manufacturing is a contract-based model where a fabless chip designer (one that owns no factories) licenses its design to an independent fab, which prints that design onto silicon wafers at scale. The foundry owns the capital-intensive equipment — photolithography machines, deposition chambers, etch tools — and sells manufacturing capacity as wafer starts: the number of wafers it commits to processing in a given period.

  Design tape-out ·············
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  Wafer fabrication ··········
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     ▼
  Yield testing ··············
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     ├─ Functional dies ······
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     └─ Defective dies ······

The critical metric inside that pipeline is yield: the percentage of individual chip dies on a wafer that test as fully functional. Yield is never 100%. Microscopic defects, process variation, and contamination all kill dies. A mature process node at a well-optimized foundry might yield 80–90% on a simple design. A cutting-edge node at a foundry still climbing the learning curve might yield 50–60% on a complex design — meaning nearly half the silicon you paid for goes in the scrap bin.

Process node refers to the feature size of the transistors being printed, measured in nanometers. Smaller nodes pack more transistors per square millimeter, improving performance and power efficiency, but they are also harder to manufacture reliably. Each successive node requires years of process development before yield stabilizes at commercial levels.

Real-world applications

The foundry model shows up in every layer of the AI stack:

• AI accelerator supply chains depend entirely on foundry capacity. If a designer's wafer allocation shrinks, GPU or NPU shipments slip, regardless of how good the chip design is.
• Multi-sourcing strategy is how sophisticated chip companies manage this risk. Spreading orders across two foundries — even if one has lower yield — provides insurance against node-specific bottlenecks at any single supplier.
• Cost modeling for AI infrastructure has to account for yield risk. A chip manufactured on a less mature process costs more per functional unit even if the wafer price is identical, because more wafers are needed to hit the same shipped-die volume.
• Foundry selection in product planning is itself a design constraint. Engineers sometimes simplify a chip's architecture, increase die redundancy, or add error-correction logic specifically to tolerate the yield characteristics of a target foundry — a practice called design-for-manufacturability.

The strategic calculus is straightforward once you see it: a chip with slightly higher manufacturing cost that ships on time beats a theoretically superior chip that sits in a capacity queue. Supply continuity is a product feature.

Where to go deeper

To build real fluency here, explore these adjacent concepts:

• Fabless vs. IDM (Integrated Device Manufacturer) — the two primary business models for chip companies, and why the fabless model concentrates foundry power.
• Lithography and EUV — the photolithography technology that makes advanced nodes physically possible, and why only one company in the world manufactures the machines that enable it.
• Wafer economics and cost-per-transistor curves — how engineers calculate whether a new node is actually cheaper per function than the previous generation.
• Supply chain risk in AI infrastructure planning — relevant for PMs and engineers building AI products whose hardware roadmaps depend on foundry availability.

If you work in AI product development, infrastructure, or hardware-adjacent roles, foundry economics is not background knowledge — it's a first-order variable in any realistic timeline discussion.